Abstract
This paper presents a pitch-matched transceiver ASIC integrated with a 2-D transducer array for a wearable ultrasound device for transfontanelle ultrasonography. The ASIC combines 8-fold multiplexing, 4-channel micro-beamforming (μ BF) and sub-array-level digitization to achieve a 128-fold channel-count reduction. The μ BF is based on passive boxcar integration and interfaces with a 10-bit 40 MS/s SAR ADC in the charge domain, thus obviating the need for explicit anti-alias filtering and power-hungry ADC drivers. A compact and low-power reference generator employs an area-efficient MOS capacitor as a reservoir to quickly set a reference for the ADC in the charge domain. A low-power multi-level data link concatenates outputs of four ADCs, leading to an aggregate 3.84 Gb/s data rate. Per channel, the RX circuit consumes 2.06 mW and occupies 0.05 mm2.
| Original language | English |
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| Title of host publication | 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9784863488069 |
| DOIs | |
| Publication status | Published - 24 Jul 2023 |
| Event | 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 - Kyoto, Japan Duration: 11 Jun 2023 → 16 Jun 2023 |
Publication series
| Series | Digest of Technical Papers - Symposium on VLSI Technology |
|---|---|
| Volume | 2023-June |
| ISSN | 0743-1562 |
Conference
| Conference | 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 |
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| Country/Territory | Japan |
| City | Kyoto |
| Period | 11/06/23 → 16/06/23 |
Bibliographical note
Funding Information:Acknowledgement This publication is part of the project MIFFY with project number 15293 of the Open Technology Programme which is financed by the Dutch Research Council (NWO).
Publisher Copyright:
© 2023 JSAP.
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