HUMA: Heterogeneous, Ultra Low-Latency Model Accelerator for The Virtual Brain on a Versal Adaptive SoC

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Abstract

Brain modeling can occur at different levels of abstraction, each aimed at a different purpose. The Virtual Brain (TVB) is an open-source platform for constructing and simulating personalized brain-network models, favoring whole-brain macro-scales while reducing micro-level detail. Among other purposes, TVB is used to build patient-specific, digital, brain twins that can be used in different clinical settings, such as the study and treatment of epilepsy. However, fitting patient-specific TVB models requires a large number of successive and time-consuming simulations. By studying the internal structure of TVB, we observed heterogeneous computation needs in its models which could be leveraged to accelerate simulations. In this work, we designed and implemented HUMA, a heterogeneous, ultra low-latency, dataflow architecture on an AMD Versal Adaptive SoC to accelerate TVB fitting to different patient-brain makeups. Our heterogeneous solution runs about 27× faster compared to a modern-day, server-class, 32-core CPU while consuming a fraction of its power. Additionally, it delivers on average about 14× lower latency, 1.7× better power efficiency and an order-of-magnitude lower energy consumption when compared against the high-performance GPU version of TVB. The achieved latency savings reveal a significant potential in model-fitting for individual patients as well as in closed-loop biohybrid experiments.

Original languageEnglish
Title of host publicationFPGA 2025 - Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays
PublisherAssociation for Computing Machinery (ACM)
Pages223-233
Number of pages11
ISBN (Electronic)9798400713965
DOIs
Publication statusPublished - 27 Feb 2025
Event33rd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2025 - Monterey, United States
Duration: 27 Feb 20251 Mar 2025

Publication series

SeriesFPGA 2025 - Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays

Conference

Conference33rd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2025
Country/TerritoryUnited States
CityMonterey
Period27/02/251/03/25

Bibliographical note

Publisher Copyright:
© 2025 Copyright held by the owner/author(s).

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