PlasticNet+: Extending multi-FPGA interconnect architecture via Gigabit transceivers

Carlos Salazar-García*, Ronny García-Ramírez, Renato Rímolo-Donadío, Christos Strydis, Alfonso Chacón-Rodríguez

*Corresponding author for this work

Research output: Chapter/Conference proceedingConference proceedingAcademicpeer-review

2 Citations (Scopus)

Abstract

This paper addresses the communication challenges posed in multi-FPGA systems, by improving a custom FPGA interconnect architecture via the high-speed transceivers available in modern FPGA development boards. The proposed network interconnection, built upon the PlasticNet architecture, is evaluated using the high-speed serial transceiver in Zynq ZC706 FPGA boards. Results show a best-case latency of only 300 ns, demonstrating equivalent results in terms of latency on a par with the known BlueLink framework, but with the plus of having total re-configurability across the different layers of its network interconnection model. This makes the current proposal a competitive option for the development of distributed, heterogeneous multi-FPGA processing systems.

Original languageEnglish
Title of host publication2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-5
ISBN (Electronic)9781728192017
DOIs
Publication statusPublished - May 2021
Event53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of
Duration: 22 May 202128 May 2021

Publication series

SeriesProceedings - IEEE International Symposium on Circuits and Systems
Volume2021-May
ISSN0271-4310

Conference

Conference53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Country/TerritoryKorea, Republic of
CityDaegu
Period22/05/2128/05/21

Bibliographical note

Publisher Copyright:
© 2021 IEEE

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